sBubshait e5c82f173f feat: fix bug

2026-06-13 17:13:50 +01:00

dist

feat: fix bug

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node_modules

first commit

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app.js

first commit

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index.html

feat: fix bug

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package-lock.json

first commit

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package.json

first commit

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style.css

first commit

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Description

FPGABench evaluates whether language models can generate FPGA-ready Verilog: not just code that simulates correctly, but designs that synthesize and meet real timing, resource, and power constraints.

6.1 MiB

Languages

CSS 37.7%

JavaScript 37.5%

HTML 24.8%